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Unlike mutex and rw_semaphore, qspinlock has no owner field, so "perf
lock contention --lock-owner" cannot attribute a contended spinlock to
its holder. The waiter-side contention_begin event records that a
spinlock is contended, but not by whom. Firing contended_release in the
holder's context at unlock is the only way to capture the holder of a
contended spinlock.
Combine the contention check, trace call and release in an out-of-line
queued_spin_release_traced() so the compiler need not preserve the lock
pointer in a callee-saved register across the call.
The check in queued_spin_unlock() is paid on every unlock, even while
the tracepoint is disabled: a static-branch NOP on x86_64, and a few
more instructions to manage a stack frame elsewhere. Gate it behind
CONFIG_QUEUED_SPINLOCKS_TRACE_CONTENDED_RELEASE (default n) so nobody
pays for a tracepoint they do not use. Sleeping locks fire
contended_release regardless.
On x86 this generic path is used only with PARAVIRT_SPINLOCKS=n (e.g.
defconfig). PARAVIRT_SPINLOCKS=y kernels keep the paravirt static_call
unlock and are wired up separately.
All below are with the QUEUED_SPINLOCKS_TRACE_CONTENDED_RELEASE option
enabled.
_raw_spin_unlock(), x86_64 defconfig, GCC 11, tracepoint compiled in but
disabled. The unlock is the single 'movb'. The only instruction added to
the executed path is the 2-byte static-branch NOP. The CALL to the
traced helper and the JMP back are emitted out of line and are reached
only once the static branch is patched on:
endbr64 ; 4 bytes
xchg %ax,%ax ; 2 static-branch NOP
; (added)
movb $0x0,(%rdi) ; 3 unlock (single store)
A: decl %gs:__preempt_count ; 7
je B ; 2
jmp __x86_return_thunk ; 5
call queued_spin_release_traced ; 5 out of line, reached
; only when the
; tracepoint is on
jmp A ; 2 (added)
B: call __SCT__preempt_schedule ; 5
jmp __x86_return_thunk ; 5
Baseline is the same stream without the NOP and the out-of-line
CALL/JMP: 31 bytes vs 40 (+9 bytes).
Binary size impact on x86_64, defconfig: +680 bytes (+0.00%), since all
standard configs out-of-line unlock. Architectures with inlined unlock
(s390 (always), csky and loongarch (both when !PREEMPTION)) will see a
bigger increase in binary size.
On the same path (x86_64, PARAVIRT_SPINLOCKS=n) with the tracepoint
disabled, a _raw_spin_unlock()-heavy nginx workload [1] shows no
measurable difference between baseline and patched kernels in
throughput, latency, cycles, instructions, IPC, or L1 instruction-cache
misses (kernel and total): all deltas stay within run-to-run noise.
Unlike x86, on arm64 the frame setup code (STP, MOV and LDP) lands on
the executed path in addition to static-branch NOP. Binary size impact
on arm64, defconfig: +932 bytes (+0.00%).
The _raw_spin_unlock()-heavy nginx workload reflects the larger hot
path: L1 instruction-cache misses rise ~1.4% (kernel and total) and
instruction count ~0.4%, consistent with the per-unlock frame.
cpu_cycles, throughput and latency show no measurable change and are
within run-to-run noise.
Architectures with fully custom qspinlock implementations (e.g.
PowerPC) are not covered by this change.
[1]: https://lore.kernel.org/all/aiphFXe_TPNPxZ_n@shell.ilvokhin.com/
Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Juergen Gross <jgross@suse.com>
Link: https://patch.msgid.link/0d998e22a0c595f670cfc6725bb683323aced5cb.1785778551.git.d@ilvokhin.com
185 lines
5.7 KiB
C
185 lines
5.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Queued spinlock
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*
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* A 'generic' spinlock implementation that is based on MCS locks. For an
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* architecture that's looking for a 'generic' spinlock, please first consider
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* ticket-lock.h and only come looking here when you've considered all the
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* constraints below and can show your hardware does actually perform better
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* with qspinlock.
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*
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* qspinlock relies on atomic_*_release()/atomic_*_acquire() to be RCsc (or no
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* weaker than RCtso if you're power), where regular code only expects atomic_t
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* to be RCpc.
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*
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* qspinlock relies on a far greater (compared to asm-generic/spinlock.h) set
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* of atomic operations to behave well together, please audit them carefully to
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* ensure they all have forward progress. Many atomic operations may default to
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* cmpxchg() loops which will not have good forward progress properties on
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* LL/SC architectures.
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*
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* One notable example is atomic_fetch_or_acquire(), which x86 cannot (cheaply)
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* do. Carefully read the patches that introduced
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* queued_fetch_set_pending_acquire().
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*
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* qspinlock also heavily relies on mixed size atomic operations, in specific
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* it requires architectures to have xchg16; something which many LL/SC
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* architectures need to implement as a 32bit and+or in order to satisfy the
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* forward progress guarantees mentioned above.
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*
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* Further reading on mixed size atomics that might be relevant:
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*
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* http://www.cl.cam.ac.uk/~pes20/popl17/mixed-size.pdf
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*
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* (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.
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* (C) Copyright 2015 Hewlett-Packard Enterprise Development LP
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*
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* Authors: Waiman Long <waiman.long@hpe.com>
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*/
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#ifndef __ASM_GENERIC_QSPINLOCK_H
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#define __ASM_GENERIC_QSPINLOCK_H
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#include <asm-generic/qspinlock_types.h>
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#include <linux/atomic.h>
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#include <linux/tracepoint-defs.h>
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#ifndef queued_spin_is_locked
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/**
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* queued_spin_is_locked - is the spinlock locked?
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* @lock: Pointer to queued spinlock structure
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* Return: 1 if it is locked, 0 otherwise
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*/
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static __always_inline int queued_spin_is_locked(struct qspinlock *lock)
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{
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/*
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* Any !0 state indicates it is locked, even if _Q_LOCKED_VAL
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* isn't immediately observable.
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*/
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return atomic_read(&lock->val);
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}
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#endif
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/**
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* queued_spin_value_unlocked - is the spinlock structure unlocked?
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* @lock: queued spinlock structure
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* Return: 1 if it is unlocked, 0 otherwise
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*
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* N.B. Whenever there are tasks waiting for the lock, it is considered
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* locked wrt the lockref code to avoid lock stealing by the lockref
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* code and change things underneath the lock. This also allows some
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* optimizations to be applied without conflict with lockref.
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*/
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static __always_inline int queued_spin_value_unlocked(struct qspinlock lock)
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{
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return !lock.val.counter;
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}
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/**
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* queued_spin_is_contended - check if the lock is contended
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* @lock : Pointer to queued spinlock structure
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* Return: 1 if lock contended, 0 otherwise
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*/
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static __always_inline int queued_spin_is_contended(struct qspinlock *lock)
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{
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return atomic_read(&lock->val) & ~_Q_LOCKED_MASK;
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}
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/**
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* queued_spin_trylock - try to acquire the queued spinlock
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* @lock : Pointer to queued spinlock structure
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* Return: 1 if lock acquired, 0 if failed
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*/
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static __always_inline int queued_spin_trylock(struct qspinlock *lock)
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{
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int val = atomic_read(&lock->val);
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if (unlikely(val))
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return 0;
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return likely(atomic_try_cmpxchg_acquire(&lock->val, &val, _Q_LOCKED_VAL));
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}
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extern void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
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#ifndef queued_spin_lock
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/**
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* queued_spin_lock - acquire a queued spinlock
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* @lock: Pointer to queued spinlock structure
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*/
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static __always_inline void queued_spin_lock(struct qspinlock *lock)
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{
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int val = 0;
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if (likely(atomic_try_cmpxchg_acquire(&lock->val, &val, _Q_LOCKED_VAL)))
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return;
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queued_spin_lock_slowpath(lock, val);
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}
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#endif
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#ifndef queued_spin_release
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/**
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* queued_spin_release - release a queued spinlock
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* @lock : Pointer to queued spinlock structure
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*/
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static __always_inline void queued_spin_release(struct qspinlock *lock)
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{
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/*
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* unlock() needs release semantics:
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*/
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smp_store_release(&lock->locked, 0);
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}
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#endif
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#ifndef queued_spin_unlock
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DECLARE_TRACEPOINT(contended_release);
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extern void queued_spin_release_traced(struct qspinlock *lock);
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/**
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* queued_spin_unlock - unlock a queued spinlock
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* @lock : Pointer to queued spinlock structure
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*
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* Generic tracing wrapper around the arch-overridable
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* queued_spin_release().
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*/
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static __always_inline void queued_spin_unlock(struct qspinlock *lock)
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{
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/*
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* Trace and release are combined in queued_spin_release_traced() so
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* the compiler does not need to preserve the lock pointer across the
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* function call, avoiding callee-saved register save/restore on the
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* hot path. queued_spin_release() is therefore called both here and in
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* queued_spin_release_traced(). Keep the two in sync.
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*/
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if (IS_ENABLED(CONFIG_QUEUED_SPINLOCKS_TRACE_CONTENDED_RELEASE) &&
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tracepoint_enabled(contended_release)) {
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queued_spin_release_traced(lock);
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return;
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}
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queued_spin_release(lock);
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}
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#endif
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#ifndef virt_spin_lock
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static __always_inline bool virt_spin_lock(struct qspinlock *lock)
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{
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return false;
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}
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#endif
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#ifndef __no_arch_spinlock_redefine
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/*
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* Remapping spinlock architecture specific functions to the corresponding
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* queued spinlock functions.
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*/
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#define arch_spin_is_locked(l) queued_spin_is_locked(l)
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#define arch_spin_is_contended(l) queued_spin_is_contended(l)
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#define arch_spin_value_unlocked(l) queued_spin_value_unlocked(l)
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#define arch_spin_lock(l) queued_spin_lock(l)
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#define arch_spin_trylock(l) queued_spin_trylock(l)
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#define arch_spin_unlock(l) queued_spin_unlock(l)
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#endif
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#endif /* __ASM_GENERIC_QSPINLOCK_H */
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